1. Field of the Invention
The present invention relates to a method of making an isolation structure in a semiconductor integrated circuit device.
2. Description of the Related Art
An element isolation technique is one of important techniques for forming a semiconductor integrated circuit such as an LSI and a VLSI. More specifically, a size of a memory cell in a memory device having a large capacity is affected by a dimension of the isolation region, and the size of the cell depends greatly on the distance between elements. At present, LOCOS (Local oxidation of silicon) is known well as an isolation technique, and a method of making the isolation structure will be described below with reference to FIGS. 5A to 5C. Phosphorus and boron are ion-implanted into, e.g., an N-type silicon semiconductor substrate 1 using a photoresist film as a mask. Thereafter, the N-type silicon semiconductor substrate 1 is annealed to form an N-type well 11 and a P-type well 12 therein. As shown in FIG. 5A, after an oxide film 13 is formed on the semiconductor substrate 1 to a thickness of about 1,000 .ANG., a polysilicon film 31 and a silicon nitride (Si.sub.3 N.sub.4) film 32 are sequentially deposited on the oxide film 13. Using a resist pattern 14 for masking element regions, the silicon nitride film 32 is selectively etched. As shown in FIG. 5B, after the resist pattern 14 is removed, a resist pattern 16 for masking the N-type well 11 is formed. Boron is ion-implanted into the resultant structure, using the resist pattern 16 and the silicon nitride film 32 remaining on the P-type well 12 as masks so as to form P.sup.+ -type diffusion layers 23. These diffusion layers 23 are provided to prevent the formation of an unwanted N-channel parasitic transistor. After the resist pattern 16 is removed, the resultant structure is heat-treated at about 1,000.degree. C. to activate the diffusion layers 23. In addition, as shown in FIG. 5C, the semiconductor substrate 1 is heat-treated at about 1,000.degree. C. while the silicon nitride film 32 covers the element regions, so that an isolation oxide film 33 is formed in the exposed regions. The thickness of the isolation oxide film 33 is of the order of 6,000 .ANG. to 8,500 .ANG.. As described above, when the semiconductor substrate surface is thermally oxidized while the element regions is masked by using the silicon nitride film, the isolation region exposed on the semiconductor substrate is oxidized. However, since the oxidation of the silicon semiconductor substrate extends to a portion under the silicon nitride film, an oxide film extension 34, i.e., a so-called bird beak is formed as shown in FIG. 5C. The length of each side of the bird beak reaches about 0.3 .mu.m as shown in FIG. 5C. That is, in FIG. 5A, even if the isolation regions are provided at the maximum resolution of lithography in formation of the resist pattern 14, the length of the isolation region is increased to 0.6 .mu.m after the isolation oxide film is formed. For example, when the maximum resolution of lithography is given by 0.7 .mu.m, the length of the isolation region becomes 1.3 .mu.m or more. This extension of the isolation region caused by the bird beak is serious hindrance to a fine structure of the semiconductor integrated circuit device. In addition, when an oxide film is formed by the thermal oxidation, a large amount of boron contained in the P-type well is added to the oxide film. Therefore, the equivalent amount of boron must be implanted into a layer under the oxide film in advance to activate the layer.